Error Control Schemes for Modern Flash Memories

66 IEEE ConsumEr ElECtronICs magazInE ^ january 2015 F lash, already one of the dominant forms of data storage for mobile consumer devices, such as smartphones and media players, is experiencing explosive growth in cloud and enterprise applications. Flash devices offer very high access speeds, low power consumption, and physical resiliency. Flash technology has improved at a dramatic rate over the course of the last ten years. Flash prices have fallen from US$3/GB in 2006 to less than US$1/GB for consumer drives. Costs have decreased to US$2/GB for enterprise-class Flash-based drives. The data storage density has increased to the point where 2-TB Flash-based solid-state drives (SSDs) are commonly available. Furthermore, the advantages of Flash have been recognized by the data center and cloud storage communities. For example, Facebook, Amazon, and Dropbox have begun to replace their traditional magnetic-storage drives with Flash-based SSDs. Increased storage density and lower prices, however, have come at the cost of decreased Flash reliability and lifetime. Device lifetimes are rated in program-erase (P/E) cycles. Traditional Flash devices, which store a single bit per Flash cell (SLC), are rated at approximately 10 P/E cycles. Storing 2 bits per cell lowers the rating to roughly 10 P/E cycles. One further bit, yielding triple-level cells in triple-level cell (TLC) devices, further lowers the rating to 10 P/E cycles. This is a disastrous trend, especially in applications that require frequent writing. The device lifetime is also negatively affected by decreasing feature size. Similar trends hold for device reliability, which is measured by the average bit-error rate (BER) at the rated lifetimes [1]. The solution to this discouraging trend is to apply errorcorrecting codes (ECCs). ECCs are frequently used in many types of computer memories. However, because of the particularly significant deficiencies present in Flash, error correction plays an especially important role. Traditional ECCs, such as Bose–Chaudhuri–Hocquenghem (BCH) codes and Reed–Solomon (RS) codes, have often been used by Flash designers. The very popular low-density parity-check (LDPC) codes are currently widely studied for Flash applications. Furthermore, an entire series of advanced coding techniques has been developed to take advantage of the unique properties of Flash memories. Our goal in this article is to provide a high-level overview of error correction for Flash. We will begin by discussing Flash functionality and design. We will introduce the nature of Flash deficiencies. Afterwards, we describe the basics of ECCs. We discuss BCH and LDPC codes in particular and Error Control Schemes for Modern Flash Memories